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A615308 Series
Preliminary
Document Title 32K X 8 BIT HIGH SPEED CMOS SRAM Revision History
Rev. No.
0.0
32K X 8 BIT HIGH SPEED CMOS SRAM
History
Initial issue
Issue Date
January 17, 2001
Remark
PRELIMINARY
(January, 2001, Version 0.0)
AMIC Technology, Inc.
A615308 Series
Preliminary
Features
n Single +5V power supply n Access times: 12 ns (max.) n Current: Operating: 150mA (max.) Standby: 12mA (max.) n Full static operation, no clock or refreshing required n n n n All inputs and outputs are directly TTL compatible Common I/O using three-state output Data retention voltage: 2V (min.) Available in 28-pin SOJ and TSOP packages
32K X 8 BIT HIGH SPEED CMOS SRAM
General Description
The A615308 is a high-speed 262,144-bit static random access memory organized as 32,768 words by 8 bits and operates on a single 5V power supply. It is built using high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Minimum standby power is drawn by this device when CE is at a high level, independent of the other input levels. Data retention is guaranteed at a power supply voltage as low as 2V.
Pin Configurations
n SOJ n TSOP
A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND
1 2 3 4 5
28 27 26 25 24
VCC WE
~ ~
A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3
6 7 8 9 10 11 12 13 14
23 22 21 20 19 18 17 16 15
OE A11 A9 A8 A13 WE VCC A14 A12 A7 A6 A5 A4 A3
1 2 3 4 5 6 7 8 9 10 11 12 13 14
A615308V
28 27 26 25 24 23 22 21 20 19 18 17 16 15
A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2
A615308S
PRELIMINARY
(January, 2001, Version 0.0)
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AMIC Technology, Inc.
~ ~
A615308 Series
Block Diagram
VCC GND A12 A13 A14 ROW DECODER 512 X 512 MEMORY ARRAY
A0
I/O0
INPUT DATA CIRCUIT
COLUMN I/O
I/O7
CE OE WE CONTROL CIRCUIT
Pin Description - SOJ
Pin No. 1 - 10, 21, 23 - 26 11 - 13, 15 - 19 20 22 27 28 14 Symbol A0 - A14 I/O0 - I/O7
CE OE WE
Pin Description - TSOP
Description Address Inputs Data Inputs/Outputs 27 Chip Enable 1 Output Enable 6 Write Enable 7 Power Supply 21 GND Ground Ground
CE OE WE
Pin No. 2 - 5, 8 - 17, 28 18 - 20, 22 - 26
Symbol A0 - A14 I/O0 - I/O7
Description Address Inputs Data Inputs/Outputs Chip Enable Output Enable Write Enable Power Supply
VCC
VCC GND
PRELIMINARY
(January, 2001, Version 0.0)
2
AMIC Technology, Inc.
A615308 Series
Recommended DC Operating Conditions
(TA = 0C to + 70C) Symbol VCC GND VIH VIL CL Parameter Supply Voltage Ground Input High Voltage Input Low (1) Voltage Output Load Min. 4.5 0 2.2 -0.5 Typ. 5.0 0 3.5 0 Max. 5.5 0 VCC + 0.5 +0.8 30 Unit V V V V pF
Absolute Maximum Ratings*
VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V IN, IN/OUT Volt to GND . . . . . . . . . . -0.5V to VCC +0.5V Operating Temperature, Topr . . . . . . . . . . . 0C to +70C Storage Temperature, Tstg . . . . . . . . . . -55C to +125C Temperature Under Bias, Tbias . . . . . . . . -10C to +85C Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . . . 1.0W
*Comments
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability.
DC Electrical Characteristics
Symbol Parameter
(TA = 0C to + 70C, VCC = 5V 10%, GND = 0V) A615308-12 Min. Max. 2 2 150 A A mA VIN = GND to VCC
CE = VIH or OE = VIH VI/O = GND to VCC CE = VIL, II/O = 0 mA Min. Cycle, Duty = 100% CE = VIH CE VCC - 0.2V VIN VCC -0.2V or VIN 0.2V
Unit
Conditions
ILI ILO ICC1 (2)
Input Leakage Output Leakage Dynamic Operating Current
-
ISB Standby Power Supply Current
-
35
mA
ISB1
-
12
mA
VOL VOH
Output Low Voltage Output High Voltage
2.4
0.4 -
V V
IOL = 8 mA IOH = -4 mA
Notes: 1. VIL = -3.0V for pulses less than 20 ns. 2. ICC1 is dependent on output loading, cycle rates, and Read/Write patterns.
PRELIMINARY
(January, 2001, Version 0.0)
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AMIC Technology, Inc.
A615308 Series
Truth Table
Mode Standby Output Disable Read Write Note: X = H or L
CE OE WE
I/O Operation High Z High Z DOUT DIN
Supply Current ISB, ISB1 ICC1 ICC1 ICC1
H L L L
X H L X
X H H L
Capacitance (TA = 25C, f = 1.0MHz)
Symbol CIN* CI/O* Parameter Input Capacitance Input/Output Capacitance Min. Max. 10 10 Unit pF pF Conditions VIN = 0V VI/O = 0V
* These parameters are sampled and not 100% tested.
AC Characteristics (TA = 0C to +70C, VCC = 5V 10%)
Symbol Parameter A615308-12 Min. Read Cycle tRC tAA tACE tOE tCLZ tOLZ tCHZ tOHZ tOH Read Cycle Time Address Access Time Chip Enable Access Time Output Enable to Output Valid Chip Enable to Output in Low Z Output Enable to Output in Low Z Chip Disable Output in High Z Output Disable to Output in High Z Output Hold from Address Change 12 3 0 0 0 3 12 12 6 6 6 ns ns ns ns ns ns ns ns ns Max. Unit
PRELIMINARY
(January, 2001, Version 0.0)
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AMIC Technology, Inc.
A615308 Series
AC Characteristics (continued)
Symbol Parameter A615308-12 Min. Write Cycle tWC tCW tAS tAW tWP tWR tWHZ tDW tDH tOW Write Cycle Time Chip Enable to End of Write Address Setup Time of Write Address Valid to End of Write Write Pulse Width Write Recovery Time Write to Output in High Z Data to Write Time Overlap Data Hold from Write Time Output Active from End of Write 12 10 0 10 10 0 0 6 0 3 6 ns ns ns ns ns ns ns ns ns ns Max. Unit
Notes: tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not referred to output voltage levles.
Timing Waveforms
Read Cycle 1(1)
tRC Address tAA
OE
tOE tOLZ5 CE tACE tCLZ5 DOUT
tOH
tOHZ5 tCHZ5
PRELIMINARY
(January, 2001, Version 0.0)
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AMIC Technology, Inc.
A615308 Series
Timing Waveforms (continued)
Read Cycle 2(1, 2, 4)
tRC Address
tAA tOH tOH
DOUT
Read Cycle 3(1, 3, 4,)
CE
tACE tCLZ5
tCHZ5
DOUT
Notes: 1. 2. 3. 4. 5.
WE is high for Read Cycle. Device is continuously enabled, CE = VIL. Address valid prior to or coincident with CE transition low. OE = VIL. Transition is measured 200mV from steady state. This parameter is sampled and not 100% tested.
PRELIMINARY
(January, 2001, Version 0.0)
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AMIC Technology, Inc.
A615308 Series
Timing Waveforms (continued)
Write Cycle 1(6) (Write Enable Controlled)
tWC Address tAW tCW 5 CE tAS1 (4) tWP 2
tWR 3
WE
tDW
tDH
DIN tWHZ 7 tOW 7 DOUT
Write Cycle 2 (Chip Enable Controlled)
tWC Address tAW tAS1 CE (4) tCW5 tWR3
tWP2 WE
tDW DIN
tDH
tWHZ 7 DOUT
Notes: 1. 2. 3. 4.
tAS is measured from the address valid to the beginning of Write. A Write occurs during the overlap (tWP) of a low CE and a low WE . tWR is measured from the earliest of CE or WE going high to the end of the Write cycle If the CE low transition occurs simultaneously with the WE low transition or after the WE transition, outputs remain in a high impedance state. 5. tCW is measured from the later of CE going low to the end of Write. 6. OE is continuously low. ( OE = VIL) 7. Transition is measured 200mV from steady state. This parameter is sampled and not 100% tested.
PRELIMINARY
(January, 2001, Version 0.0)
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AMIC Technology, Inc.
A615308 Series
AC Test Conditions
Input Pulse Levels Input Rise and Fall Time Input and Output Timing Reference Levels Output Load 0V to 3.0V 2 ns 1.5V See Figures 1 and 2
5V 480 DATAOUT 30pF 255 DATAOUT 5pF*
5V 480
255
* Including scope and jig.
Figure 1. Output Load
Figure 2. Output Load for tCLZ, tOLZ, tCHZ, tOHZ, tWHZ, and tOW
Data Retention Characteristics (TA = 0C to 70C)
Symbol VDR Parameter VCC for Data Retention Min. 2 Max. 5.5 Unit V Conditions
CE VCC - 0.2V
ICCDR
Data Retention Current
-
1
mA
VCC = 2.0V CE VCC - 0.2V VIN VCC - 0.2V or VIN 0.2V
tCDR tR
Chip Disable to Data Retention Time Operation Recovery Time
0 tRC*
-
ns See Retention Waveform ns
tRC = Read Cycle Time
PRELIMINARY
(January, 2001, Version 0.0)
8
AMIC Technology, Inc.
A615308 Series
Low VCC Data Retention Waveform
DATA RETENTION MODE VCC 4.5V tCDR 4.5V tR
VDR 2.0V
VIH CE CE VDR - 0.2V
VIH
Ordering Information
Part No. A615308S-12 A615308V-12 Access Time (ns) 12 12 Operating Current Max. (mA) 150 150 Standby Current Max. (mA) 12 12 Package 28L SOJ 28L TSOP
PRELIMINARY
(January, 2001, Version 0.0)
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AMIC Technology, Inc.
A615308 Series
Package Information SOJ 28L Outline Dimensions
unit: inches/mm
28
15
1
14
D C A2 A A1 S Seating Plane b b1
HE
E
e
L
e1 y
Symbol A A1 A2 b1 b C D E e e1 HE L S y
Dimensions in inches Min 0.027 0.095 Nom 0.100 0.028 TYP 0.018 TYP 0.010 TYP 0.295 0.255 0.329 0.077 0.710 0.300 0.050 BSC 0.265 0.337 0.087 0.275 0.345 0.097 0.045 0.004 0.730 0.305 Max 0.140 0.105
D
Dimensions in mm Min 0.69 2.41 Nom 2.54 0.71 TYP 0.46 TYP 0.25 TYP 7.49 6.48 8.36 1.96 18.03 7.62 1.27 BSC 6.73 8.56 2.21 6.99 8.76 2.46 1.14 0.10 18.54 7.75 Max 3.56 2.67
Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension e1 is for PC Board surface mount pad pitch design reference only. 4. Dimension S includes end flash.
PRELIMINARY
(January, 2001, Version 0.0)
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AMIC Technology, Inc.
A615308 Series
Package Information TSOP 28L TYPE I (8 X 13.4mm) Outline Dimensions
unit: inches/mm
D1 1 28 A2
Detail "A"
E
A1
c
L
14 D
15
y
D
e
Detail "A"
S
b
Dimensions in inches Symbol A A1 A2 b c E L D D1 e S y 0 Min 0.002 0.037 0.007 0.005 0.311 0.012 0.520 0.461 Nom 0.039 0.009 0.315 0.020 0.528 0.465 0.022 BSC 0.017 TYP 0.004 5 Max 0.049 0.041 0.011 0.008 0.319 0.028 0.536 0.469
Dimensions in mm Min 0.05 0.95 0.17 0.12 7.90 0.30 13.20 11.70 Nom 1.00 0.22 8.00 0.50 13.40 11.80 0.55 BSC 0.425 TYP 0 0.10 5 Max 1.25 1.05 0.27 0.21 8.10 0.70 13.60 11.90
Notes: 1. The maximum value of dimension D1 includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash.
PRELIMINARY
(January, 2001, Version 0.0)
11
AMIC Technology, Inc.
A

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